This type of oscillator circuit is disclosed in the state of the art by CH Patent No. 623 450, which also provides a polarisation resistor arranged between the gates and drains of the inverter transistors. This assembly produces a voltage oscillation in the quartz to generate an oscillation signal at a frequency determined by the first output electrode of the quartz.
To make a low power consuming oscillator circuit by reducing the current in the active branch of the oscillator, the polarisation resistance must have a high value. This high value polarisation resistance must be chosen so that it does not destroy the necessary negative resistance, which is generated by the inverter and the current passing therethrough to maintain the quartz oscillation. When this type of low power consuming oscillator circuit is integrated in a silicon substrate, using a high value resistor may be problematic, since it occupies a good deal of space in the integrated circuit. This is thus a drawback of this type of low power consuming oscillator circuit.
The amplitude of the quartz oscillation can also be maintained by an adaptable current source controlled by a regulating unit. An embodiment of this type of regulating unit is disclosed, for example, in the article entitled, “Quartz oscillators for watches” by Eric A. Vittoz, published in the proceedings of the tenth International Chronometry Congress, Geneva, September 1979, Vol. 3, pages 131 to 140.
In the article entitled “High-performance crystal oscillator circuits: Theory and application” by Eric A. Vittoz, published in the IEEE journal of solid-state circuits, IEEE service center, Piscataway, NJ, US, vol. 23, no. 3 on 1 Jun. 1988, it is provided to arrange between the drain and gate terminals of a MOS transistor M1 in an active branch of the oscillator circuit, a pseudo-resistor, which is active polarisation means. As shown in FIG. 11 of this article, this pseudo-resistor is made using a MOS transistor M17, for which the drain and source terminals are respectively connected to the drain and gate terminals of the MOS transistor M1. The gate terminal of the pseudo-resistor transistor is polarised via two MOS transistors M19 and M15, which are series-mounted in diode with a current source M10 between two supply terminals of the supply voltage source.
A drawback of this arrangement shown in FIG. 11 of this article, is that the polarising current supplied by the current source M10 is lost through the two transistors mounted in diode. This polarising current is used only to define determined potentials of said transistors mounted in diode, and does not contribute for the operation in the active branch of the oscillator.
In the CH Patent No. 689 088, it is described an oscillator circuit in which the active polarisation means are an operational transconductance amplifier mounted as a voltage follower between the drain and gate terminals of a MOS transistor in an active branch of the oscillator circuit. Two capacitors C1, C2 are each connected respectively to a quartz terminal K and to the earth, whereas a compensation capacitor CK is connected between the output of the amplifier and one terminal of the quartz. Said capacitors C1, C2 have a great capacitive value in order to stabilise the amplifier, which constitutes a drawback, because they don't allow make a small size oscillator circuit.